Imagine in steampunk fashion wed get an alternative future timeline where computer tech froze in 80s due to some physical limitation that prohibited shrinking transistors. all typical laptops would have same config as this awesome project. what would the society become?
Speed certainly wouldn't be there, but capabilities would. Plenty could get done on those old machines — most of it had to do with programmers having the imagination & skill to be able to shoehorn their ideas into spaces they weren't meant to be crammed into.
One memory this project brought to mind for me was a hack I came across which allowed simultaneously running DOS 3.3 & ProDOS on a 128k Apple II, giving each 64k (well, a little less due to overhead) & a way to switch between the two with a simple command. Two programs couldn't run at once, but one could step between the two OSes to run programs made for each pretty seamlessly. If this sort of thing was possible on basic consumer hardware, ten or twenty years of development would have led to many far more interesting & useful things.
I believe the actual silicon of a 6502 is much smaller than the DIP package, so even if we couldn't shrink the silicon itself much more, you could just take up more space inside the package, and use a package that has more pins in it, like current CPU designs. You would probably hit a bottleneck at some point since I believe the speed of light is a problem for processing speed at some point, but then I'd expect we'd just go into massively parallel systems, with multiple cores acting somewhat individually
I was thinking lately about how much memory you could handle on a 6502. The BBC Micro had a 16KB block of RAM paged between up to 16 ROMs/RAM but if you could have 256 banks you could do 4MB. One problem is that that would require a very large PCB. Another problem is that the OS searches for commands on all the ROMs and this would become slow for so many banks; one solution would be to limit the ROMs to the first few banks and let the rest be RAM.
It could be useful for some sort of minicomputer for business applications.
Depends entirely on what banking scheme you use. Nothing stops you from adding e.g. an 8-bit banking register (even two of them, one for instruction fetches, another one for normal memory reads/writes) to serve as bits 23–16 for the 24-bit memory bus. That's what WDC 65C816 from 1985 does, but it also goes full 16-bit mode as well.
And if you have a 16-bit CPU, you can do all kinds of silly stuff; for instance, you can have 4 16-bit MSRs, let's call them BANK0–BANK3, that would be selected by the two upper bits of a 16-bit address, and would provide top 16 bits for the bus, while the lower 14-bits would come from the original address. That already gives you 30 bits for 1 GiB of addressable physical memory (and having 4 banks available at the same time instead of just 2 is way more comfortable) and nothing stops you from adding yet another 4 16-bit registers BANK0_TOP–BANK3_TOP, to serve as even higher 16 bits of the total address — that'd give you 16+16+14 = 46 bit of physical address (64 TiB) which is only slightly less than what x64 used to give you for many years (48 bits, 256 TiB).
Imagine in steampunk fashion wed get an alternative future timeline where computer tech froze in 80s due to some physical limitation that prohibited shrinking transistors. all typical laptops would have same config as this awesome project. what would the society become?
Speed certainly wouldn't be there, but capabilities would. Plenty could get done on those old machines — most of it had to do with programmers having the imagination & skill to be able to shoehorn their ideas into spaces they weren't meant to be crammed into.
One memory this project brought to mind for me was a hack I came across which allowed simultaneously running DOS 3.3 & ProDOS on a 128k Apple II, giving each 64k (well, a little less due to overhead) & a way to switch between the two with a simple command. Two programs couldn't run at once, but one could step between the two OSes to run programs made for each pretty seamlessly. If this sort of thing was possible on basic consumer hardware, ten or twenty years of development would have led to many far more interesting & useful things.
I believe the actual silicon of a 6502 is much smaller than the DIP package, so even if we couldn't shrink the silicon itself much more, you could just take up more space inside the package, and use a package that has more pins in it, like current CPU designs. You would probably hit a bottleneck at some point since I believe the speed of light is a problem for processing speed at some point, but then I'd expect we'd just go into massively parallel systems, with multiple cores acting somewhat individually
Okay what if something else had prevented something better than a 6502 being mass market available?
I was thinking lately about how much memory you could handle on a 6502. The BBC Micro had a 16KB block of RAM paged between up to 16 ROMs/RAM but if you could have 256 banks you could do 4MB. One problem is that that would require a very large PCB. Another problem is that the OS searches for commands on all the ROMs and this would become slow for so many banks; one solution would be to limit the ROMs to the first few banks and let the rest be RAM.
It could be useful for some sort of minicomputer for business applications.
Depends entirely on what banking scheme you use. Nothing stops you from adding e.g. an 8-bit banking register (even two of them, one for instruction fetches, another one for normal memory reads/writes) to serve as bits 23–16 for the 24-bit memory bus. That's what WDC 65C816 from 1985 does, but it also goes full 16-bit mode as well.
And if you have a 16-bit CPU, you can do all kinds of silly stuff; for instance, you can have 4 16-bit MSRs, let's call them BANK0–BANK3, that would be selected by the two upper bits of a 16-bit address, and would provide top 16 bits for the bus, while the lower 14-bits would come from the original address. That already gives you 30 bits for 1 GiB of addressable physical memory (and having 4 banks available at the same time instead of just 2 is way more comfortable) and nothing stops you from adding yet another 4 16-bit registers BANK0_TOP–BANK3_TOP, to serve as even higher 16 bits of the total address — that'd give you 16+16+14 = 46 bit of physical address (64 TiB) which is only slightly less than what x64 used to give you for many years (48 bits, 256 TiB).
I was trying to get a grasp on what would be pratical.
Even 4MB would take you hours to load from floppies with a 6502.
Terabytes with a 68000 would also be impractical.
Laptops would be a lot less common. If computers were stuck in this era for that long, fewer people would be interested. Prices would be high.
Amazing